A High-Range-Accuracy and High-Sensitivity Harmonic Radar Using Pulse Pseudo random Code for Bee Searching

         

 

            There are three departments which are auto control, radio wave and insect in “A High-Range-Accuracy and High-Sensitivity Harmonic Radar Using Pulse Pseudo random Code for Bee Searching” project.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

         The system expected to search bee and realize how to disappear, but real-time requirement cannot be achieved on original version.

 

            A 8-b oscilloscope with a sampling rate of 2 GHz is used to capture the waveforms. Consequently, the time resolution of the delay is 0.5 ns. This time resolution leads to a high ideal range accuracy of 7.5 cm. Laptop cannot do such large computation in 0.5 ns, so we decide to use Virtex-7 with high-speed 4 channel ADC(analog-to-digital converter). It saves a lot of time on sending data to each other. All of actions are finished on Xilinx FPGA mother board. Although hardware computation time is shorter than software, the correlator is more complicated to establish in hardware.

 

It takes one and a half year to do my job in this project.

• First, the user interface software(written by C#). 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

• Second, controlling smart motor(Antenna rotation angle) to custom way with user interface button.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

• Third, replacing the oscilloscope(capture raw data) and laptop(compute correlation & distance) with Xilinx Virtex-7 chip.

 

              We use FPGA DSP48E1 Slice to computing the large multiplication and addition.  There are 2520 DSP48E1 on chip, and we use 2047 DSP48E1 in our system. Following figure shows hardware structure. The router receives data(per data is 16 bits) continuously until it receives 2048 data(A input:1024; B input:1024). And then router sends all of data to DSP48E1 through registers. After the final DSP48E1 computes the result, the router receives data again.

         The amount of inputs data A is 1024000, so the final result would be computed after 1000 periods. However, one period just takes ten clocks, because the parallel structure share the computation to all DSP48E1. Finally, the DSP48E1 final would sum 1000 results as output.